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Bit-serial and digit-serial GF(2m) Montgomery multipliers using linear feedback shift registers
MIGUEL MORALES SANDOVAL
CLAUDIA FEREGRINO URIBE
Paris Kitsos
Acceso Abierto
Atribución-NoComercial-SinDerivadas
This work presents novel multipliers for Montgomery multiplication defined on binary fields GF(2m). Different to state of the art Montgomery multipliers, this work uses a linear feedback shift register (LFSR) as the main building block. The authors studied different architectures for bit-serial and digit-serial Montgomery multipliers using the LFSR and the Montgomery factors xm and xm−1. The proposed multipliers are for different classes of irreducible polynomials: general, all one polynomials, pentanomials and trinomials. The results show that the use of LFSRs simplifies the design of the multipliers architecture reducing area resources and retaining high performance compared to related works.
The Institution of Engineering and Technolog
2011
Artículo
Estudiantes
Investigadores
Público en general
Morales-Sandoval, M., et al., (2011). Bit-serial and digit-serial GF(2m) Montgomery multipliers using linear feedback shift registers, The Institution of Engineering and Technology, Vol. 5 (2): 86 – 94
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Aparece en las colecciones: Artículos de Ciencias Computacionales

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