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A design-oriented methodology for accurate modeling of on-chip interconnects
OSCAR GONZÁLEZ DÍAZ
MONICO LINARES ARANDA
Reydezel Torres Torres
Acceso Abierto
Atribución-NoComercial-SinDerivadas
ABCD matrix
De-embedding procedure
Interconnection lines
Lumped equivalent circuit
Distributed equivalent circuit
Modeling
S-parameters
VLSI circuits
An accurate modeling methodology for typical on-chip interconnects used in the design of high frequency digital, analog, and mixed signal systems is presented. The methodology includes the parameter extraction procedure, the equivalent circuit model selection, and mainly the determination of the minimum number of sections required in the equivalent circuit for accurate representing interconnects of certain lengths within specific frequency ranges while considering the frequency-dependent nature of the associated parameters. The modeling procedure is applied to interconnection lines up to 35 GHz obtaining good simulation-experiment correlations. In order to verify the accuracy of the obtained models in the design of integrated circuits (IC), several ring oscillators using interconnection lines with different lengths are designed and fabricated in Austriamicrosystems 0.35 μm CMOS process. The average error between the experimental and simulated operating frequency of the ring oscillators is reduced up to 2% when the interconnections are represented by the equivalent circuit model obtained by applying the proposed methodology.
Springer Science+Business Media
2011
Artículo
Inglés
Estudiantes
Investigadores
Público en general
Gonzalez-Diaz, O., et al., (2011). A design-oriented methodology for accurate modeling of on-chip interconnects, Analog Integrated Circuits and Signal Processing, Vol. 71, (2): 221–230
ELECTRÓNICA
Versión aceptada
acceptedVersion - Versión aceptada
Aparece en las colecciones: Artículos de Electrónica

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