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Design of 2-D CMOS processors | |
Héctor Christian Bandala Hernández | |
ALEJANDRO DIAZ SANCHEZ JOSE MIGUEL ROCHA PEREZ | |
Acceso Abierto | |
Atribución-NoComercial-SinDerivadas | |
CMOS image sensors Statical filters Order statistic | |
Solid State Sensors play a significant role among technology applications. Advances on Image Sensors (also called Imagers) on technologies such as Charge Coupled Devicess (CCDs), Complementary Metal-Oxide-Semiconductor (CMOS) and Silicon on insulator (SOI) have been remarkable in the last pair of decades. Moreover, there are currently several applications in various fields such as medicine, astronomy, biology and security where other kinds of 2-D processor arrays are implemented; one of the sensors most commonly implemented in such arrays is the Ion-sensitive Field Effect Transistor (ISFET). Depending on the application, the 2-D sensor arrays may have different features, e.g. spatial resolution, which is the number of Processing Elements (PEs), Dynamic Range (DR) (number of amplitude resolution levels of each pixel), noise floor and Frames-per-second (fps). However, high accuracy and precision are two of the most desirable parameters in every 2-D sensor array, no matter the application nor fabrication technology. This work proposes a set of processing elements at pixel level in order to obtain high precision and high accuracy of any generic 2-D sensor array. This is achieved by means of pre-processing (pixel-level processing) techniques, consisting in the use of different Order Statistic and Nonlinear Filters designed and fabricated in CMOS technologies, applied to di_erent 2-D sensor arrays: a 3x3 cells array fabricated in 0.35m AMI Opto CMOS technology, sensitive to visible electromagnetic spectrum (400-700nm), basic cells sensitive to medium Ultraviolet (UV) (0.5m ON Semi CMOS technology) electromagnetic spectrum (200-400nm) and a 2-D ISFET array (0.5m ON Semi CMOS technology). Another kind of statistical filters, Rank Order Filters (ROFs), are presented as proof of concept for future kernel implementation on 2-D arrays. Rank Order Filters presented in this work are actually two di_erent analog topologies and the experimental results will be also presented. Finally, multi-level filters are applied to a case of compressed sensing imaging, where a previously reported architecture of a 64x64 pixels is described. This compressed sensing technique requires both a compress stage and a reconstruction stage; since the Structural Similarity Index Module (SSIM) is a good quality measure of image reconstruction, this parameter is also described in Chapter 1. The described architecture represent a State-of-the-art proposal for Compressed Sensing (CS); therefor | |
2018-03 | |
Tesis de doctorado | |
Inglés | |
Estudiantes Investigadores Público en general | |
Bandala Hernández, Héctor Christian, (2018). Design of 2-D CMOS processors, Tesis de Doctorado, Instituto Nacional de Astrofísica, Óptica y Electrónica | |
DISEÑO DE CIRCUITOS | |
Versión aceptada | |
acceptedVersion - Versión aceptada | |
Aparece en las colecciones: | Doctorado en Electrónica |
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