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http://inaoe.repositorioinstitucional.mx/jspui/handle/1009/211| Design criteria for a discrete time chaos based CMOS true random number generator | |
| JOSE LUIS VALTIERRA SANCHEZ DE LA VEGA | |
| ESTEBAN TLELO CUAUTLE | |
| Acceso Abierto | |
| Atribución-NoComercial-SinDerivadas | |
| Chaos Random number generation Analogue integrated circuits Oscillators Chaos generator Mixed analogue-digital integrated circuit | |
| Random number generators are a fundamental component in cryptographic applications such as key generation and digital signatures. Software based solutions have proven effective in some situations, nevertheless, the need for hardware integrated circuit (IC) random number generators based on truly random physical phenomena has been recognized by major information technology companies. Discrete time chaotic dynamical systems exhibit properties such as extreme sensitivity to the initial conditions and noiselike trajectories. These properties in combination with an initial condition set by thermal noise produce a highly unpredictable output suitable for truly random number generation. However, discrete time chaotic systems based IC true random number generators are not without problems. Several design considerations have to be made in order to maintain the properties of the chaotic dynamical system based circuit at the heart of the true random number generator. In this work, design guidelines aimed at guaranteeing the correct operation of a proposed discrete time chaotic circuit are obtained through mathematical modeling. A true random number generation scheme based on the proposed circuit is then introduced. Finally, the suitability of the scheme as a true random number generator is validated with the NIST test suite 800-22. | |
| Instituto Nacional de Astrofísica, Óptica y Electrónica | |
| 2014-10 | |
| Tesis de maestría | |
| Inglés | |
| Estudiantes Investigadores Público en general | |
| Valtierra-Sanchez-de-la-Vega J.L. | |
| ELECTRÓNICA | |
| Versión aceptada | |
| acceptedVersion - Versión aceptada | |
| Aparece en las colecciones: | Maestría en Electrónica |
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| Fichero | Descripción | Tamaño | Formato | |
|---|---|---|---|---|
| ValtierraSVJL.pdf | 1.31 MB | Adobe PDF | Visualizar/Abrir |