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http://inaoe.repositorioinstitucional.mx/jspui/handle/1009/2066| Low Voltage Lazzaro's WTA with enhanced loop gain | |
| JOSE MIGUEL ROCHA PEREZ ALEJANDRO DIAZ SANCHEZ | |
| Acceso Abierto | |
| Atribución-NoComercial-SinDerivadas | |
| WTA Low voltage Non-linear circuits | |
| An additional stage for a Low Voltage Lazzaro's Winner Take All (WTA) circuit is introduced. It allows lowering the voltage supply requirements so that it can be functional in fine line CMOS technology. Electrical measurements of a prototype in CMOS 0.5 µm technology verify the operation of the WTA circuit with VDD=1.5V. Simulations in PSpice and stability issues are presented as well. | |
| IEICE Electronics Express | |
| 06-04-2012 | |
| Artículo | |
| Inglés | |
| Estudiantes Investigadores Público en general | |
| Molinar-Solis, Jesus E., et al., (2012), Low Voltage Lazzaro's WTA with enhanced loop gain, IEICE Electronics Express, Vol. 9(7): 648–653. | |
| CIRCUITOS INTEGRADOS | |
| Versión aceptada | |
| acceptedVersion - Versión aceptada | |
| Aparece en las colecciones: | Artículos de Electrónica |
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| Fichero | Tamaño | Formato | |
|---|---|---|---|
| 17 Alejandro_2012_IEICE9-7.pdf | 2.33 MB | Adobe PDF | Visualizar/Abrir |