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Our repository is a digital platform that contains all our academic, scientific, technological and innovation information, which is linked to the National Repository CONACYT following international standards set out in the Technical Guidelines for the construction of institutional repositories published by CONACYT.

Browsing by Author RENE ARMANDO CUMPLIDO PARRA


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Showing results 1 to 20 of 41


Issue DateTitlePublication Type/ Resource TypeAuthor(s)Submit Date
Feb-2014A design methodology for automatic generation of processor arrays based on the polytope modelTesis de doctoradoJUAN MANUEL CAMPOS DIAZ6-Nov-2017
Aug-2016A method to estimate the reliability of FPGA-based architectures for space systemsTesis de maestríaJUAN ANDRES PEREZ CELIS24-Nov-2017
2012A multi-cycle fixed point square root module for FPGAsArtículoFernando Martín del Campo Ramírez; ALICIA MORALES REYES; JOSE ROBERTO PEREZ ANDRADE; RENE ARMANDO CUMPLIDO PARRA; ALDO GUSTAVO OROZCO LUGO; CLAUDIA FEREGRINO URIBE5-Nov-2019
2010A single formula and its implementation in FPGA for elliptic curve point addition using affine representationArtículoMIGUEL MORALES SANDOVAL; CLAUDIA FEREGRINO URIBE; RENE ARMANDO CUMPLIDO PARRA; IGNACIO ALGREDO BADILLO17-Sep-2018
Dec-2008A software-radio platform with reconfigurable architecture on MAC layer for security systemsTesis de maestríaIGNACIO ALGREDO BADILLO18-Sep-2017
2009A system on a programmable chip architecture for data-dependent superimposed training channel estimationArtículoFERNANDO MARTIN DEL CAMPO RAMIREZ; RENE ARMANDO CUMPLIDO PARRA; JOSE ROBERTO PEREZ ANDRADE; ALDO GUSTAVO OROZCO LUGO13-Jun-2018
2010A versatile hardware architecture for a constant false alarm rate processor based on a linear insertion sorterArtículoJOSE ROBERTO PEREZ ANDRADE; RENE ARMANDO CUMPLIDO PARRA; CLAUDIA FEREGRINO URIBE; FERNANDO MARTIN DEL CAMPO RAMIREZ17-Sep-2018
2008A versatile linear insertion sorter based on a FIFO schemeArtículoJOSE ROBERTO PEREZ ANDRADE; RENE ARMANDO CUMPLIDO PARRA; FERNANDO MARTIN DEL CAMPO RAMIREZ; CLAUDIA FEREGRINO URIBE13-Jun-2018
2012Algorithm and hardware architecture for the discovery of frequent sequencesTesis de maestríaOSVALDO NAVARRO GUZMAN30-Oct-2017
Jan-2008Algoritmo robusto de marcas de agua usando similitudes basado en la codificación fractalTesis de maestríaPEDRO AARON HERNANDEZ AVALOS25-Sep-2017
Nov-2018An adaptive pixel value ordering based reversiblewatermarking scheme for image authenticationTesis de maestríaGabriel Melendez8-Feb-2019
2009An area/performance trade-off analysis of a GF(2m) multiplier architecture for elliptic curve cryptographyArtículoMIGUEL MORALES SANDOVAL; CLAUDIA FEREGRINO URIBE; RENE ARMANDO CUMPLIDO PARRA; IGNACIO ALGREDO BADILLO15-Jun-2018
Nov-2014Arquitectura hardware compacta para criptografía ligera de llave públicaTesis de maestríaLUIS ARMANDO RODRIGUEZ FLORES-
Mar-2010Arquitectura hardware-software para acelerar el entrenamiento de SVMTesis de maestríaLAZARO BUSTIO MARTINEZ26-Sep-2017
Feb-2008Comparación de la eficiencia en hardware de los cifradores de flujo grain, mickey-128 y trivium de ecryptTesis de maestríaBLANCA NYDIA PEREZ CAMACHO4-Oct-2017
Aug-2008Data-dependent superimposed raining architecture for wireless communication systemsTesis de maestríaFERNANDO MARTIN DEL CAMPO RAMIREZ19-Sep-2017
Oct-2008Design and Implementation of a Non-pipelined MD5 Hardware Architectures using a new functional descriptionArtículoIGNACIO ALGREDO BADILLO; CLAUDIA FEREGRINO URIBE; RENE ARMANDO CUMPLIDO PARRA; MIGUEL MORALES SANDOVAL16-Mar-2018
2012Design of processor array based on an optimized multiprojection approachArtículoJUAN MANUEL CAMPOS DIAZ; RENE ARMANDO CUMPLIDO PARRA11-Oct-2019
Oct-2009Detección automática en señales de radar basada en conocimientoTesis de doctoradoSANTOS MARTIN LOPEZ ESTRADA18-Sep-2017
2017Digital forensics method for image tampering detection Tesis de maestríaDaniel Arroyo30-Aug-2018